This invention relates to a semiconductor device such as an MOS transistor which shortens the essential channel length by forming a groove.
A tendency toward an integration of high density, and toward a high speed operation of MOS IC, necessitates a considerable miniaturization of the individual MOS transistors forming the IC.
The shortening of so-called channel length between regions of source and drain of MOS transistors is desirable in order to reduce the volume of the MOS transistor and the electrostatic capacity of the gate portion, thus increasing the operation speed. When the channel length L between the source and drain regions is sufficiently large in comparison with diffusion depths X.sub.j of the source and drain regions and the breadth of depletion layer, an equipotential line becomes approximately parallel to the substrate surfaces, and the operation of the MOS transistor is stable, not depending upon the channel length L or the diffusion depth of X.sub.j ; however, when a channel length becomes equal or less than 5.mu. and extends to the diffusion depths X.sub.j of the source and drain regions and to the breadth of the depletion layer, the equipotential lines in the channel becomes distorted and its distribution depends upon the depth X.sub.j of diffusion of the source and drain regions and the breadth of depletion layer. In consequence, a threshold value of voltage Vth allowing the source and drain regions to conduct by means of applying voltage Vth to the gate electrode, decreases with a reduction of the channel length and a small scatter of the channel length causes a big dispersion of the threshold voltage Vth.
Even more so, the said equipotential line ends up by depending upon the diffusion depths X.sub.j of the source and drain regions and the voltage applied to the drain, and it is liable to produce a punch through between the source and drain regions, due to the effect of short channel. In order to deal with this kind of problem, diffusion depths X.sub.j of the source and drain regions may be minimized. However, the manufacture of an MOS transistor with small X.sub.j causes other problems, such as difficulties of heat treatment and penetration, the drop of the breakdown voltage at a p-n junction in the neighborhood of a semiconductor substrate and the increase of sheet or surface resistances of diffusion area of the source and drain.
Instability and difficulty of such operation characteristics are big obstacles in the manufacture of IC of higher integrality.